1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor chip and a TAB package therefore.
2. Description of the Related Art
Tape automated bonding (TAB) techniques may employ inner lead bonding (ILB) for inner connections. TAB techniques also may provide a reel-to-reel package assembly using a reel type tape wiring board. A package manufactured by the TAB technique is referred to as a TAB package. The TAB package may include a tape carrier package (TCP) and a chip on board (COB). The TAB package may be thin and have fine pitch. A TAB package may be used in a wide range of applications, examples of which include in a watch, a calculator, a driver IC for a liquid crystal display, and a micro-processor for a personal computer.
FIG. 1 is a plan view of a conventional semiconductor chip 10 for a TAB package. FIG. 2 is a plan view of a conventional TAB package 100 having the semiconductor chip 10 of FIG. 1. FIG. 3 is a cross-sectional view taken along the line of I-I of FIG. 2.
Referring to FIGS. 1 through 3, the semiconductor chip 10 may be inner lead-bonded to a TAB tape 20. The inner lead-bonded portion may be sealed using a liquid molding compound 30 through an underfill process.
The semiconductor chip 10 may have input pads 14 and output pads 16 formed on the active surface 12 thereof. The semiconductor chip 10 may have increasingly finer pitch as the number of the input/output pads 14 and 16 increases. The semiconductor chip 10 may be an edge-pad type semiconductor chip, on which the input/output pads 14 and 16 are arranged along the edges. The input pads 14 may be larger in size and pitch than the output pads 16. This may prevent faults due to static electricity between the input pads 14. The input pads 14 may include pads for power and pads for grounding.
The TAB tape 20 may include a base film 21, wiring patterns 23 and sprocket holes 29. The base film 21 may be where the semiconductor chip 10 may be mounted. The wiring patterns 23 may be formed on the base film 21. The sprocket holes 29 may be arranged along the edges of the base film 21 at predetermined intervals. The wiring patterns 23 may include input terminal patterns 25 and output terminal patterns 27. The input terminal patterns 25 may extend to one side of the base film 21 relative to the semiconductor chip 10. The output terminal patterns 27 may extend to the other side of the base film 21 relative to the semiconductor chip 10. Ends of the input terminal patterns 25 and the output terminal patterns 27 may extend parallel to the arrangement of sprocket holes 29.
One end of each input terminal pattern 25a may be inner lead-bonded to the input pads 14a for power or for grounding and the other ends may be combined for power or for ground, respectively.
The trend of semiconductor products is toward miniaturization, high-speed, multi-function and high-performance. Reduced overall size of a semiconductor chip as well as the increased number and reduced pitch of input/output pads serve this trend. Conventionally, formation of input/output pads has been confined to a peripheral area of a semiconductor chip. The number of input/output pads which can be placed on the semiconductor chip may be limited. Excessive reduction of pitch of input pads may cause faults due to static electricity between the input pads. These factors may limit potential size reduction in a semiconductor chip.
The increased number of input/output pads may lead to the increased size of a semiconductor chip. This may result in a reduced number of semiconductor chips obtainable from a single wafer.
Further, the increased number of input/output pads may lead to finer pitch wiring patterns or increased size of a TAB tape. This may result in increased manufacturing costs of a TAB tape.
As a result, the fine pitch of wiring patterns may require a high-precision TAB package manufacturing process. This may result in reduced productivity of a TAB package.